January 6 – 10, 2007 | Bangalore, India
 
 
Visit Sequence Design at VLSI Design Conference 2007!

Don’t miss the VLSI Conference 2007, featuring 5 days of in-depth presentations of various aspects of VLSI design, electronic design automation (EDA), enabling technologies, and embedded systems.
 
  • Is your design power-sensitive?
  • Do you compete on power specs?
  • Are you high-volume and packaging costs matter?
  • Would you like to learn more about power management from RTL through GDS?
Visit Sequence Design at the D’Gipro booth
 
Click here to register - http://vlsiconference.com/regd/registration.php
 
Also, Sequence will participate in the EDA panel: "Has EDA Become a “Doormat” for the Semiconductor Design Industry?" Join us January 9, 2006 (Tuesday) Time: 5 pm to 6:15 pm
 
Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence's power and signal- integrity software solutions give customers the competitive advantage necessary to excel in aggressive technology markets, despite the demanding complexity and time-to-market issues of nanometer design.