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Customer Testimonials


	"PowerTheater identified ways to improve our clock design resulting in significant power savings allowing us to meet stringent power efficiency specifications; in addition we have saved chip area and improved power-grid performance using CoolTime."

	Jim McCreary Exec. VP of Engineering FyreStorm


	"Sequence design tools can help IBM's ASIC customers produce accurate, meaningful results early in the design flow, where they need power data most."

	Mark Merrill, Senior Manager of ASIC Design Methodology IBM


	"We need power estimation tools capable of handling the full system-on-chip task early in the design cycle. After conducting a detailed survey of the marketplace, we determined that Sequence offers the only tools able to do this. This is a crucial part of our RTL analysis suite of tools, allowing power consumption to be determined prior to synthesis and enabling us to get closer to RTL sign-off."

	Stefan Linz Power Analysis Specialist Infineon Technologies


	"PowerTheater helps us understand and reduce power at RTL when it counts. We get immediate feedback to help us understand the power profile early, allowing the team to examine multiple 'what-if' scenarios to optimize the chip architecture for low power."

	Hiroyuki Sakurai Senior engineer Key Stream


	"We have taped out several generations of 802.11 designs with excellent results. PowerTheater consistently provides us with a pure RTL power analysis that correlates at 12% to silicon."

	Derrick Lin Senior Director of Engineering Airgo (now Qualcomm)


	"Prior to using PowerTheater, Ricoh relied on a conventional spreadsheet approach to analyze power dissipation and consumption. Using this approach we consistently exceeded the limitations of metal layers needed for these devices. The only way to meet power budgets, therefore, was to increase the number of metal layers which would have a major impact on cost. Since switching to PowerTheater, providing accurate and automated RTL power estimation, Ricoh designers can now minimize power early in the design cycle and verify that power budgets are met. The result was that additional metal layers were avoided."

	Makoto Saito Ricoh Group Leader, 1st Development Section, 2nd Development Department Platform Development Center, Imaging System Business Group , Ricoh


	"CoolTime-PGA is a fast, accurate analysis engine that will be a fine complement to other outstanding technologies in the STARCAD-CEL flow."

	Nobuyuki Nishiguchi, vice president and general manager, Development Department-1, STARC


	"PowerTheater has become an integral part of Tensilica's internal processor design flow."

	"PowerTheater has proven to be versatile and useful in meeting our power goal efficiently."

	"Many of our customers are building portable devices so power is naturally a critical dimension for us. We are estimating power at the RT Level using Sequence's PowerTheater, giving us insights into power analysis much earlier and on a larger number of processor configurations than was previously possible."
	Himanshu Sanghavi Hardware Engineering Manager Tensilica


	"PowerTheater helps us manage, estimate and reduce power when it counts: at RTL, pre-synthesis. Early power exploration of various architectures is critical to our success in low-power design."

	Sanjay Kasturia CEO Teranetics


	"In portable wireless design, it is critically important for TI to reinforce the value that our technology brings to OEMs. Sequence's wireless design tools enabled us to deliver power numbers to our customer much earlier in the design cycle and optimize the design for low power."

	Rakesh Patnaik Program Manager Microcontroller Development Texas Instruments


	"[CoolPower's] unique timing and signal integrity optimization capabilities in pre- and post-route modes have helped us achieve design closure faster. Traditional solutions were not able to address our design issues because of high operating frequencies, multi-million transistor counts and a hierarchical approach. Sequence's solution plugged into our existing design flow easily to resolve these complex design issues."

	Nader Vasseghi CEO AuroraNetics(now Cisco)


	"CoolTime is the only concurrent engine available on the market for analyzing timing, signal integrity, voltage drop in a single tool."

	Scott Sellers Vice President of Hardware Engineering, CTO, and Co-founder Azul Systems


	"I really appreciate the Sequence attitude that they are aiming for "accuracy", which in their context means, achieving closure without false positives or false negatives. Yes!"

	Clive Maxfield EEdesign


	"We are very impressed with the hierarchical pre- and post-route timing optimization capabilities of Sequence's [CoolPower] tool. [CoolPower] fit seamlessly in the design flow, was predictable, fast, and helped us resolve our critical design issues in a timely manner."

	Anoop Khurana VP of Engineering Ikanos


	"We have taped-out over 60 designs using [CoolPower's] signal integrity sign-off capability. We have received silicon for all of these designs and have not seen any signal integrity issues in them. This clearly demonstrates that [CoolPower] was able to detect all the problems before tape-out saving us several silicon re-spins. We are extremely happy with [CoolPower] and have made it an integral part of our sign-off flow for all 0.13u and 0.18u designs."

	Yoshito Muraishi Senior CAD Manager Kawasaki Microelectronics


	"Signal integrity is a key issue for our high performance, high utilization, multi-million gate designs. [CoolPower] is a comprehensive solution for signal integrity, including coupling delay and glitch, and provides for both analysis and optimization. We have successfully integrated [CoolPower] into our physical design flow."

	Joe Greco VP of Engineering NVIDIA


	“CoolTime supports concurrent analysis of multiple power and ground rails. CoolTime met our stringent criteria for accuracy, capacity, performance, and flow integration…”

	Teruaki Harada Department Manager of DFM & EDA Technology Development Dept. Renesas


	"S3 saved several months on achieving design closure based on CoolPower's ability to concurrently solve for, analyze, and optimize timing and noise. We use Sequence for final signoff with an Astro flow, and Cool Products deliver faster run time, accurate results, and reduced iterations between different tools."

	Xin Chang, Manager of Engineering, S3 Graphics


	"Sequence Design's [CoolPower] [is] the only design tool capable of optimizing chip timing and signal integrity concurrently, both before and after routing."

	Rex Naden President and COO Silicon Access Networks


	"Sequence really showed us a technically superior solution. Their CoolProducts bring us a completely integrated, back-end power management flow with outstanding analysis and optimization capabilities."

	David McKinney Engineering Manager, CMOS ASICs Tektronix


	"The leakage current reduction realized by Sequence is not possible with any other currently available tool. Sequence's innovative circuit design and automation techniques used on Toshiba's MTCMOS technology automatically reduced leakage currents while concurrent electrical checks ensured that the logic and signaling did not violate user-specified limits on key electrical parameters such as virtual ground voltages and currents."

	Shin-ichi Imai Senior Manager System LSI Design Department Toshiba Corporation


	"Design at 0.13u and below requires our design team to have a clear understanding of voltage drop and its impact on timing and signal integrity."

	Jim Vanaria Director of COT Design TranSwitch


	"Our designers are particularly pleased that Columbus consistently delivers the inductance modeling and accurate capacitance that we need."

	Myrianne Regis Ph. D. RF Design Project Manager ACCO


	"Using Sequence's Columbus-RF extraction back-annotated simulations has given Exar a time-to-market advantage when compared to schematic simulations without LPE."
	Exar


	"Columbus delivers unparalleled advantages in our 90 nanometer design flow."

	Praveen Acharya Vice President, VLSI & Semiconductor Solutions, Advanced Technology Solutions KPIT Cummins Infosystems Limited


	"We have been impressed with Columbus-Turbo's 3 million nets per hour speed, and by how easy [it was] to integrate into our design environment."

	Michael Sydow VP Marketing & Applications Engineering Lightspeed Semiconductor


	“Columbus-AMS is the most precise extraction engine for our 90nm process. We trust its accuracy.”

	Hisaharu Miwa Department Manager, EDA Technology Development Department, Design Technology Division, LSI Product Technology Unit Renesas


	"We like Columbus for its accurate RLC extraction capabilities. But in addition to pure performance, we found it easy to use and integrate with our Calibre flow, and it has unlimited design capacity. We've been using Columbus for many Mixed-Signal designs which requires precise accuracy, and we will expand more."

	Masami Harigai manager SANYO Semiconductor Mixed Signal Division


	“Columbus-AMS is a vast improvement over existing tools. Its accuracy is unparalleled, and it has proven itself as the only viable method for inductance extraction we have tested.”

	Tamotsu Hiwatashi Senior Manager System, LSI Design Division Toshiba


	"Sequence Design's interconnect process characterization methodology is impressive and has proven benefits. It provides improved accuracy in characterization of the silicon process for interconnect modeling, which is a fundamental requirement for design closure. We value our strong working relationship with Sequence and look forward to continued collaboration on additional projects."

	Genda Hu Vice-President Marketing TSMC

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