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| For More Information: |
Sequence Design, Inc.
+91.120.400.1400 |
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| Customer Quotes |
| "Power has become a critical design factor. Sequence's RTL approach is the first to address power during the early stages of the design, where the real impact is to be found. RTL is where the best opportunities exist for optimization." |
Jonathan Young
Design Methodology Manager
Sony Semiconductor |
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 Welcome to the Sequence Design Low-Power Design Seminar |
Sequence Design, is taking its popular seminar to Bangalore for the first time on Aug. 30, 2006. The event is co-sponsored by Sequence, Virage Logic, and D'gipro, the distributor for Sequence products for the India market. Please join us and you will come away equipped to make an informed choice between various design alternatives based on the power characteristics of your design.
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| 9.00 – 9.30 |
Welcome and Sequence Low Power Solutions Overview:
Mark Goldman, VP Sales, Sequence Design |
| 9.30 – 10.00 |
Keynote by Bharadwaj Amrutur on Low Power Design |
| 10.00 – 10.20 |
Integrated Low Power Design Flow Demo, featuring Silicon-Aware PowerTheater 65
Sanjay Budhwar, Director Applications & Consulting, Sequence Design |
| 10:20 - 10:30 |
Tea Break |
| 10:30 - 11:15 |
Keynote - Design Challenges for Broadband Wireless SOCs
By Rajat Gupta, Managing Director of BeCeem, India
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| 11:15 - 12:00 |
Design Case Study
Pankaj Panjwani, Lead Physical Design Engineer, Genesis |
| 12:00 - 12:30 |
Low power design and memories
Amit Khanuja, Low Power Group Leader, Virage Logic |
| 12:30 - |
Lunch and lottery results |
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Prof. Bharadwaj Amrutur - Assistant Professor in the Department of Electrical Communication Engineering, Indian Institute of Science, Bangalore. He will discuss academic breakthroughs relating to low-power design.
Rajat Gupta - Managing Director of Beceem, India, will discuss design challenges for broadband wireless SOCs.
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