SANTA CLARA, Calif.--(BUSINESS WIRE)--Jan. 29, 2004--To reduce time to market for a family of advanced networking silicon, Teradiant Networks built a "single-pass" design flow from best-in-class EDA vendors, and selected Sequence Design's CoolTime for signal-integrity signoff.

"The need for SI analysis is significant," according to Teradiant director of engineering, Chakki Kavoori. "Below 130 nanometers there is cross-coupling all over the chip, and with CoolTime we can readily determine which ones affect performance and target them for corrective action."

Using Sequence for final signoff does not extend time to market since the tool enjoys extremely fast runtimes, typically five to 10 times faster than competing products, and large capacities. It was also a simple matter to integrate CoolTime-SI within Teradiant's existing flow thanks to tight links between Sequence and mainstream EDA tools.

More details on Teradiant's use of CoolTime is available online: Teradiant.pdf.

About CoolTime

In addition to crosstalk-induced delay and glitch, CoolTime accounts for voltage-drop induced delays during timing analysis. CoolTime renders a complete timing and signal-integrity capability that accounts for on-chip and off-chip physical effects. With a built-in characterization engine for derating delays for voltage drop, CoolTime augments existing timing library formats for accurate timing analysis. An SDF output with voltage drop and crosstalk induced delays can be generated from CoolTime for signoff timing analysis.

CoolTime augments and complements the user's installed physical implementation flow for fast, full-chip signoff of hierarchical SoC designs by eliminating the need for multiple analysis tools and multiple iterations. CoolTime shares a common platform with Sequence's PhysicalStudio(TM) for pre- and post-route optimization of timing and signal integrity, thereby enabling fast and accurate design closure for nanometer SoC designs.

About Teradiant Networks

Teradiant Networks develops and markets semiconductors that enable networking system manufacturers to build scalable switch and router platforms for next-generation networks. Its TeraPacket 8000 Series and 9000 Series families are the first traffic manager devices to be available in single-chip solutions for 10Gbps through 40Gbps performance. Teradiant semiconductors are optimized for a range of applications in core, edge, metro and enterprise networks -- both for SONET/SDH and Ethernet. For more information, visit www.teradiant.com or call 408-519-1700.

About Sequence

Sequence Design, Inc. enables system-on-chip designers to bring higher-performance and lower-power integrated circuits quickly to fabrication. Sequence's power and signal integrity software give its more than 100 customers the competitive advantage they need to excel in aggressive technology markets, despite demanding complexity and time-to-market issues of nanometer design.

Sequence has worldwide development and field service operations. The company was recently named by Reed Electronics as one of the top 50 companies to watch in the electronics industry. Sequence is privately held. Sequence is a member of Cadence Design Systems' Connections^(TM) and Mentor Graphics' Open Door^(TM) partnership programs. Additional information is available at sequencedesign.com.