SANTA CLARA, Calif. - Feb. 13, 2007 - Sequence Design, the EDA leader in power-aware SoC design solutions, today announced statistically accurate PVT corner extraction, along with new features to enable a best-of-breed flow for extracting and analyzing power rails in full-custom blocks using Columbus-AMS.

Columbus-AMS now combines Statistically Accurate Interconnect Corners (SAC) with temperature effects for analyzing PVT variations in 65nm designs. Developed cooperatively with NEC Electronics, Columbus-AMS with SAC cuts over-design by eliminating pessimism. Users can specify temperature for each corner, producing combined PVT corners that work with existing STAs, instead of requiring a complex transition to statistical STA tools. Columbus extracts multiple PVT points in one run, speeding turnaround while insuring identical parasitic topology for all points.

Columbus Fast Rail Extraction models power rails in full-custom blocks. Working with Calibre-LVS, it extracts the rails in typical blocks in minutes with accurate resistance values and electromigration annotation, including for 45-degree lines. Columbus then combines rail parasitics, signal-net parasitics, and the layout netlist to create a complete DSPF for HSIM-PWRA or other analysis tools. Speedview-AMS now accepts HSIM resistance data, as well as voltage-drop and EM data. This combination of Calibre-LVS, Columbus Fast Rail Extraction, Columbus-AMS, HSIM, and Speedview-AMS gives the most complete, efficient, graphical analysis of rails available.

About Columbus

The Columbus extraction product family is part of Sequence's high-performance, low-power design lineup: PowerTheater, CoolPower, CoolCheck, and CoolTime. Columbus-AMS is both a foundation for the company's RTL-to-silicon, power-aware design tools for SoCs and the industry's leading RLC parasitic extraction tool for high-performance digital and analog/mixed-signal designs. Sequence customers have taped out over 200 successful, high-performance designs using Columbus-AMS extraction.


About Sequence

Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence's power and signal- integrity software solutions give customers the competitive advantage necessary to excel in aggressive technology markets, despite the demanding complexity and time-to-market issues of nanometer design. Sequence serves over 150 customers worldwide, in application segments such as consumer, wireless, mobile computing, multimedia, cell phones, digital cameras, network-on-chip processors, and other power-sensitive markets. Sequence has worldwide development and field-service operations and is privately held. Please see sequencedesign.com.