SANTA CLARA, Calif. - June 2, 2003 - Sequence Design announced it is working with NEC Electronics Corporation to develop new RC extraction capabilities in Columbus-AMS to support its copper process technology at 90nm and below.

“Sequence is the only company able to help us achieve our accuracy goals for transistor-level RC extraction at 90 nanometers,” according to Toshiyuki Saito, department manager, Technology Foundation Development Division, NEC Electronics Corporation. “Columbus-AMS was selected because it can guarantee the femto-farad capacitance resolution necessary for our advanced IP-core designs. We are happy that Sequence has produced an interconnect modeling methodology for us that can handle copper process variation correctly at 90nm and below.”

Columbus-AMS is a 3-D, RLC extractor for mixed-signal, analog, memory, and full-custom digital designs of 1 million transistors or more. The tool is based on Sequence’s award-winning ExtractionStage, a suite of high-performance software tuned for complex, multi-million-gate SoCs and analog/mixed-signal design.

According to Dr. Susheel Chandra, Sequence senior vice president of R&D and product marketing, Columbus-AMS provides NEC Electronics with a perfect complement to its existing design flow: “With these extremely fine copper processes, it is vital that the accuracy and dependability of your extraction engine be maintained. We are pleased to be engaged in this joint development with NEC Electronics to advance the reliability of this process, and once again demonstrate the versatility of Columbus-AMS.”

Dr. Chandra noted that Columbus-AMS has been designed for easy integration into industry-standard design flows, such as the Mentor Calibre flow, making user adoption a fast and painless process.

Columbus-AMS Feature Summary

• Highly accurate (within 2 percent to 5 percent of a field solver) inductance, capacitance, and resistance extraction
• Ideal for million-plus transistor, mixed-signal, analog, memory, and custom digital designs
• Integrated into the Cadence Analog Design Environment
• Supports both Calibre and Diva LVS flows
• Easy to set up and use – configurable for a variety of analog devices
• Eliminate the need to support complex parasitic-extraction rule decks
• Supported in IBM design kits for SiGe processes (Diva flow)

About Sequence

Sequence Design, Inc. enables system-on-chip designers to bring higher-performance and lower-power integrated circuits quickly to fabrication. Sequence’s power and signal integrity software give its more than 100 customers the competitive advantage they need to excel in aggressive technology markets, despite demanding complexity and time-to-market issues of nanometer design.

Sequence has worldwide development and field service operations. The company was recently named by Reed Electronics as one of the top 50 companies to watch in the electronics industry. Sequence is privately held. Sequence is a member of Cadence Design Systems’ Connections^TM and Mentor Graphics’ Open Door^TM partnership programs. Additional information is available at sequencedesign.com.