|
| |
Sequence Signs Chelsio, Sets Milestone: 100th PowerTheater Customer
|
| 10Gb Ethernet
Leader Praises PowerTheater Speed, Performance |
| SANTA
CLARA, Calif. - June 5, 2008 - Sequence Design, the EDA leader
in Design for Power (DFP) solutions, today announced it has
signed its 100th PowerTheater customer, 10 Gigabit Ethernet
pioneer Chelsio Communications.
Chelsio is planning to use Sequence's PowerTheater in the
design of its advanced scalable, high-performance 10Gb Ethernet
unified wire engine ASIC, enabling simultaneous support of
iSCSI, RDMA and TCP/IP socket applications.
Speed and performance of PowerTheater were key selling points
and Chelsio praised both its analytical precision at RTL and
ease of use. "PowerTheater gives us early analysis and
visibility into power issues such as cycle-by-cycle power
dissipation for both peak and average power," said Kianoosh
Naghshineh, president and CEO of Chelsio. "In the past,
designers only had to worry about timing optimization, but
today power is a key competitive differentiator and PowerTheater
is the tool that gives us the edge we need."
"Sequence continues to leapfrog the competition with
superior technology," said Vic Kulkarni, Sequence president
and CEO. "Today's announcement of our 100th PowerTheater
customer demonstrates that we continue to be the company to
beat in low-power design."
Sequence Design will showcase its complete portfolio of DFP
solutions, including the recently announced PowerArtist with
automated RTL power reduction, at DAC in Anaheim June 8-13,
Booth 2100.
About PowerTheater/PowerTheater-Explorer
PowerTheater is the industry's first RTL power analysis and
power prototyping solution with the singular ability to accurately
analyze power at RTL and support power management techniques
such as voltage islands, mixed voltage threshold, power gating,
and clock gating. PowerTheater recently added support for
the Si2 CPF standard along with the following new features:
|
- Control all aspects of running PowerTheater through a
single Tcl-based command file.
- Identify high-power windows utilizing comprehensive simulations
from hardware accelerators.
- Compute full-chip, gate-level power efficiently using
RTL simulations.
- Prevent voltage-drop related test and functional failures
by automatically identifying critical vectors from multiple
simulations.
|
PowerTheater-Explorer is an innovative
capability that adds state-of-the art power visualization and
debug features for fast, interactive RTL power analysis. A new
SmartSource Viewer allows designers to determine hot spots in
the design, to visualize, debug and interactively analyze a
design's power consumption. The hierarchical RTL power tree
display shows hot spots that can be cross-probed to schematics,
showing connectivity and indicating how activity is moving through
the design and how instances impact one another. These results
can be displayed and analyzed at RTL, gate, or mixed levels
of abstraction. SmartSource also provides a dedicated view of
the clock tree for fast analysis and tracing of clock nets in
the design. For more information, visit: www.sequencedesign.com/solutions/powertheater.php.
Chelsio (www.chelsio.com)
is leading the convergence of networking, storage and clustering
interconnects with its robust, high-performance and proven unified
wire technology. Featuring a highly scalable and programmable
architecture, Chelsio is shipping 10-Gigabit Ethernet ASICs
and multi-port Gigabit Ethernet adapter cards, delivering the
low latency and superior throughput required for high-performance
computing applications.
About Sequence
Sequence Design's Design For Power (DFP) solutions accelerate
the ability of SoC designers to bring high-performance, power-aware
ICs quickly to market. Sequence's power and signal-integrity
software give customers the competitive advantage necessary
to excel in aggressive technology markets. Sequence is an active
participant in industry organizations advancing low-power design
technologies such as the Power Forward Initiative and holds
a seat on the board of Si2. For more information: sequencedesign.com.
|
### All trademarks
mentioned herein are the property of their respective owners.
|
| |
|
|
|
|