SANTA CLARA, Calif. - July 17, 2006 - Addressing the complex issues of low-power design at 65nm and below is Sequence Design's Silicon Aware PowerTheater 65, the industry's first RTL power analysis and management solution with physical-design features to insure results that closely relate to real silicon.

"The stakes are being raised at 65nm," said Vic Kulkarni, Sequence president and CEO. "We have been working closely with key customers around the world to understand and address mission-critical issues of power management as they migrate their designs from 130 to 90 to 65nm. By offering early, accurate power analysis, closely correlated to silicon, PowerTheater 65 addresses SoC power-design challenges and speeds time to market for even the largest, most complex designs."

Silicon Aware PowerTheater 65

PowerTheater 65 enhances its singular ability to accurately estimate power at RTL with Silicon-Aware features for voltage islands, mixed voltage threshold, power gating, and clock gating. PowerTheater 65's capabilities include:

• Accurate RTL Power Analysis
• Analyze power early and often
• Estimate block, full-chip power
  
  
• New Silicon-Aware Features
  Most power reduction techniques are defined during the physical implementation of the design. However, PowerTheater 65's early visibility into design tradeoffs involving these techniques at RTL is valuable for competitive specs, cost, yield, and reliability, among other benefits.
  
  
• Silicon-Aware RTL Power Reduction
• Make early architectural tradeoffs so designers can reduce power at RTL using "what-if" scenarios with silicon-aware prediction technology
• Eliminate wasted power
• Explore power management techniques
• Clock Gating
  Saves up to 25% of total clock power with increasingly Silicon-Aware, accurate prediction of the effects of clock gating on a design. Reports are available for multiple clocks or by clock domain, including clock networks and associated logic.
• Clock Power Estimation
  Detailed reports can predict clock power at RTL by inserting clock trees, and at gate level trace an existing clock tree and report gate-level power.
• Mixed Vt Power Estimation
  Cells characterized for different threshold voltages (Vt) provide major benefits for the control of leakage power. PowerTheater 65's RTL power estimation employs hierarchical distribution of mixed Vt cells using multi-Vt libraries, delivering up to 15% power savings.
• Voltage Islands
  Voltage islands is a popular technique to reduce power, involving running slower blocks at lower voltages to reduce overall power. PowerTheater 65 allows users to predict power savings by using this technique, early at RTL, when libraries are not available. It can both derate existing libraries and use characterized libraries to predict and estimate power savings. Field-tested results indicate typical power savings using this technique are from 10% to 50%.
• Power Gating
  Power Gating allows for the aggressive reduction of leakage power, but is expensive from both a monetary and resource perspective. PowerTheater 65 performs power domain creation, and simulation-based and vectorless power estimation of power domains, allowing designers to make informed decisions on whether power gating is good for that specific design and if the selected sleep signal is optimal before investing too much time and money. Using this technique results in power savings from 10-1,000X.
  
  
• Modal Power Analysis
  Power vector forward technology to select vectors for downstream analysis, feeding them to later stages of the design cycle for gate-level verification and voltage-drop analysis.
  
  
• Gate Level Power Verification
  PowerTheater 65 supports mixed RTL and gate power verification, as well as modal power analysis at both RTL and gate level. PowerTheater now accepts RTL simulation vectors (VCD and FSDB) for gate-level power analysis. PowerTheater promotes fast, compact RTL simulation with modal analysis to exercise power during all modes of operation. Designers can examine a much wider set of stimuli without requiring unwieldy gate-level VCD files that are time consuming to generate, promoting worst-case power analysis.

Price/Availability

PowerTheater 65 is available now. North America list price begins at $115K for a 1-year TBL. Additional information on PowerTheater 65 and all Sequence products: http://www.sequencedesign.com/solutions/overview.php

Demos of all Sequence products will be available at DAC by advance registration.

About Sequence

Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence's power and signal- integrity software solutions give customers the competitive advantage necessary to excel in aggressive technology markets, despite the demanding complexity and time-to-market issues of nanometer design. Sequence serves over 150 customers worldwide, in application segments such as consumer, wireless, mobile computing, multimedia, cell phones, digital cameras, network-on-chip processors, and other power-sensitive markets. The company was named by Reed Electronics as one of the top 10 companies to watch in the electronics industry, and was recently selected as one of high-tech's Top 100 companies by siliconindia magazine. Sequence has worldwide development and field-service operations and is privately held. Please see sequencedesign.com.