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Sequence
TAB Member Dr. Kimiyoshi Usami Delivers Presentation On Advanced
Power-Gating Techniques At ICCD |
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SANTA CLARA,
Calif. - Oct. 3, 2006 - Dr. Kimiyoshi Usami, a professor at
Tokyo's Shibaura Institute of Technology, and longtime member
of Sequence Design's Technical Advisory Board (TAB), presented
a paper on advanced power-gating techniques at the IEEE International
Conference on Computer Design (ICCD) this week in San Jose,
Calif.
The paper, co-authored with his student Naoaki Ohkubo, described
a new approach of power gating technique called Fine-Grained
Run-Time Power Gating to use sleep signals that are not off-chip,
but are extracted locally within the design, to partition
the design and then use power switches to conserve overall
power. Tested on a 90nm process microprocessor core, this
technique achieved active leakage power savings of 83 percent,
and used Sequence Design's CoolPower to size and physically
partition the power switches.
CoolPower contains the industry's richest set of power optimization
capabilities. Both dynamic and leakage power can be automatically
optimized using CoolPower's cell resizing and Multi-Vt cell
swapping features respectively, and MTCMOS power gating optimization
and analysis offers the most effective method of reducing
leakage power.
Dr. Usami received BS, MS and PhD from Waseda University in
Japan in 1982, 1984 and 2000. He joined Toshiba Corp. in 1984,
where he researched design methodology and circuit design
for microprocessors. From 1993 to 1995, he was a visiting
scholar at Stanford University. He studied dual-VDD design
techniques to reduce power, with an adviser Prof. Mark Horowitz.
After going back to Toshiba, he was responsible for development
and deployment of low-power design technologies for system
LSI's. In 2003 he joined Shibaura Institute of Technology,
and is currently a professor and a department head of the
Information Science & Engineering. His research interest
includes design techniques to reduce dynamic and leakage power.
"We have been very pleased have Dr. Usami with us in
San Jose for this important event," said Sequence president
and CEO, Vic Kulkarni. "His research on power reduction
techniques have made significant contributions to our industry,
and to advancing the latest power-aware features of Sequence
products." |
| About ICCD |
| The 24th International Conference
on Computer Design (ICCD) encompasses a wide range of topics
in the research, design, and implementation of computer systems
and their components. ICCD's multi-disciplinary emphasis provides
an ideal environment for developers and researchers to discuss
practical and theoretical work covering system and computer
architecture, verification and test, design and technology,
and tools and methodologies. For more information: www.iccd-conference.org. |
| About Sequence |
| Sequence Design accelerates
the ability of SoC designers to bring high-performance, power-aware
ICs quickly to market. Sequence's power and signal- integrity
software solutions give customers the competitive advantage
necessary to excel in aggressive technology markets, despite
the demanding complexity and time-to-market issues of nanometer
design. Sequence serves over 150 customers worldwide, in application
segments such as consumer, wireless, mobile computing, multimedia,
cell phones, digital cameras, network-on-chip processors, and
other power-sensitive markets. The company was named by Reed
Electronics as one of the top 10 companies to watch in the electronics
industry, and was recently selected as one of high-tech's Top
100 companies by siliconindia magazine. Sequence has worldwide
development and field-service operations and is privately held.
Please see sequencedesign.com. |
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All trademarks mentioned herein are the property of their respective
owners. |
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