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 Sequence
to Host DFP Seminar November 8 in Japan |
Sequence Design,
EDA's Design-For-Power (DFP) technology leader, will host its
fifth low-power design seminar in Tokyo on Thursday, Nov. 8,
2007, at Tokyo's Akihabara Convention Hall. The seminar focuses
on reducing and managing power throughout the design flow. Japanese
chip designers in power-sensitive markets are encouraged to
attend by contacting Sequence Japan at: hishikawa@sequencedesign.com,
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