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 Event
Calendar |
Come see Sequence Design at these Seminars
and Events. We're frequently adding new events to our calendar
so be sure to check back frequently.
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June 08-13, 2008
Sequence Design's DAC Booth #2100 (Located at the entrance
to Hall D)
Anaheim Convention Center, Anaheim, CA
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today for one of our exciting DAC
Demo Suite Sessions: |
- NEW: 10-50% Automated RTL Power Reduction
- RTL Power Management
- Power-grid Integrity
- Signal Modeling and Rail Analysis for custom designs
Stay tuned for Customer Presentation Sessions in our
booth!
Also see Sequence at
the following DAC Events:
Sequence Design, Inc. Exhibitor Forum Presentation
on Design for Power
Wednesday, June 11, 2008, 3:20 PM - 4:00 PM, Exhibit
Hall D, Booth 2849
Presenter: Jerry Frenkil, Sequence Design, Inc.
For details, visit: http://www.dac.com/events/eventdetails.aspx?id=77-203
Low Power Coalition Workshop- Advances in Low
Power Design for Circuits and Systems
Sunday, June 08, 2008, 4:00 PM - 7:00 PM, Room 206B
Speaker: Jerry Frenkil, Sequence Design, Inc.
For details, visit: http://www.dac.com/events/eventdetails.aspx?id=77-156
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ISQED, DoubleTree Hotel, San Jose,
CA, Donner Room
March 19, 2008 |
ICM, Munich, Germany, room 04a
March 10, 2008 |
Every Thursday 10:30AM-12 PST
October 18 through December 20, 2007 |
Akihabara Convention Hall, Tokyo
November 8, 2007 |
The Taj Residency, Bangalore
September 19, 2007 |
Santa Clara, CA
August 15, 2007 |
Hyderabad, India
July 30-31,2007 |
San Diego, California,
June 4 - 8, 2007 |
Acropolis, Nice, France, room Gallieni
4
April 18 |
Acropolis, Nice, France
April 16 - 20, 2007 |
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Monterey, CA
April 12 - 13, 2007
Holly Stump speaking on - Power Management Early
in the Design Flow: Exploration to Implementation
For more details: |
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San Jose, Austin and Boston
April 2007
Sequence will participate in TSMC Symposium, "The
Proven Path of Success," showing their complete low
power design flow.
For
more details: |
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Pacifico Yokohama, Kanagawa,
January 25-26, 2007 |
The Most Targeted & Informative System-on-Chip (SoC) Conference
& Exhibit Event of the Year! Savant's International System-on-Chip
(SoC) Conferences & Exhibits have become one of the most
important technical and informative conferences for the
chip design community. Savant conferences are recognized
for their highly practical, educational content and for
their collaboration with major industry enablers and top
academic experts.
Panel: "EDA Challenges for Complex SoC and ASIC Designs" |
Sophia Antipolis, France
October 4th & 5th, 2006
For
more details: . |
Is Power
an Issue in your SoC Design?
Power-Aware
Design Flow Seminar for 130nm to 65nm SoCs
Would you like to reduce power consumption
up to 50%?
This
half-day seminar on SoC power issues, solutions and analysis
techniques is brought to you by Sequence Design, the leader
in low power design , and Arithmatica, the silicon math
company.
For more details:
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Past Events |
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