We thank you for visiting our DAC suite and booth. We had companies worldwide attend our suite demos, and our launch of PowerArtist was successful with over 45 customers showing a serious interest in RTL power reduction. For those of you who could not attend DAC this year, you might have heard the phrase ""

PowerTheater proved the value of analyzing power at RTL, and PowerArtist takes this concept to the next level by automatically reducing power up to 50 % in just minutes in a million-plus gate block at this early stage of the design. Alternatively, users can call up changes recommended by PowerArtist in a powerful new GUI that flags problem areas and guides them through a series of manual edits.

PowerArtist is able to achieve these dramatic savings by focusing on the three biggest power-hungry areas in today's typical SoC:

• Memory - 20-50% of total power consumption
• Clock - 30-60% of total power consumption
• Datapath - 20-30% of total power consumption
  
  

In an already power-optimized processor design, PowerArtist helped us identify 20% additional clock power reduction opportunities. By finding ways to reduce power in clock, memory, and datapath, and then highlighting the precise RTL code we needed to change, PowerArtist can provide us with a huge productivity gain. Jon Gibbons Vice President of VLSI Engineering Ubicom

Sequence R&D has come up with 10 new and novel methods of reducing power in these three key areas. And in auto mode, PowerArtist can prioritize opportunities and revise the original code while preserving your original RTL formatting.

By now you have probably seen some of the press coverage for PowerArtist or heard about it from colleagues, but seeing is believing! Contact us to learn more about PowerArtist, so that you can paint your own low-power masterpiece.