SANTA
CLARA, Calif.--(BUSINESS WIRE)--Nov. 2, 2004 --Sequence
today announced a major milestone in its recent power optimization
efforts with Toshiba, successfully signing-off Toshiba's wireless
design using Sequence's MTCMOS (Multi-Threshold CMOS) technology.
With this success, Sequence becomes the EDA industry's first
company to achieve power-gating optimization by dramatically
reducing leakage on a 90 nanometer design.
"The leakage current reduction realized by Sequence
is not possible with any other currently available tool,"
said Shinichi Imai, senior manager of System LSI Design Department,
Toshiba Corporation. "Sequence's innovative circuit design
and automation techniques used on Toshiba's MTCMOS technology
automatically reduced leakage currents while concurrent electrical
checks ensured that the logic and signaling did not violate
user-specified limits on key electrical parameters such as
virtual ground voltages and currents."
MTCMOS power-gating works to reduce leakage currents by disconnecting
the power supply from portions of the circuit when those portions
are inactive. Leaking currents are prevented by inserting
a series switch transistor between the logic cells and the
power supply or ground. The switch is closed when the logic
is operational and opened when the logic is inactive. Sequence
and Toshiba have worked together to develop an automated process,
based on Sequence's Physical Studio framework, to size and
insert power-rail switching transistors. Reductions of 10x
to 100x in leakage can be achieved by using this technique.
"Toshiba and Sequence share a common vision and passion
to take the challenge of power consumption at the nanometer
level head-on, and it's a very humbling experience to have
realized this goal with our partner," said Vic Kulkarni,
CEO and president of Sequence Design. "The results of
our work will bring immense value to the VLSI designers and
VLSI companies battling the leakage problem in nanometer design."
Leakage control has become a major design issue due to leakage
currents that drain a battery's charge even when a wireless
device is inactive or in standby mode. Transistors in each
new process generation are leakier than those in previous
generations (due to transistor scaling effects), only exacerbating
the problem.
Leakage is also an issue in active mode, when the transistors
are operational, as any power wasted due to leakage is not
available to be allocated to performance enhancing logic --
that is, leakage power comes right off the top of the overall
power budgets.
Sealing the Leak
The Sequence power methodology includes fully automatic gate
level power optimization technology for the reduction of both
dynamic and leakage power. The optimizations may be run independently
or together with no adverse impact on area or timing. Sequence's
MTCMOS approach utilizes patent pending optimization algorithms
that result in minimum area overhead and minimal performance
impact.
Leverages NanoCool Experience
The addition of MTCMOS technology to Sequence's PhysicalStudio
leverages the company's experience in low-power design tools
as part of its NanoCool Initiative, a joint venture between
semiconductor designers, EDA tool vendors, IP companies, and
library suppliers, to provide a complete flow offering concurrent
power management, timing and signal integrity capabilities
to achieve rapid design closure at 90 nanometers and below.
Artisan, Novas and GoldenGate are part of the NanoCool initiative.
About Sequence
Sequence Design, Inc. enables system-on-chip designers to
bring higher-performance and lower-power integrated circuits
quickly to fabrication. Sequence's power and signal integrity
software give its more than 130 customers the competitive
advantage they need to excel in aggressive technology markets,
despite demanding complexity and time-to-market issues of
nanometer design.
Sequence has worldwide development and field service operations.
The company was recently named by Reed Electronics as one
of the top 10 companies to watch in the electronics industry.
Sequence is privately held. Sequence is a member of Cadence
Design Systems' Connections(TM) and Mentor Graphics' Open
Door(TM) partnership programs. Additional information is available
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