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In-Sequence Partners Program

The In-Sequence Program promotes a low power ecosystem to provide comprehensive solutions for SoC design. Sequence partners with EDA companies, IP and library vendors, foundries, ASIC vendors, and industry bodies to promote well integrated design flows.


	"Working together lets us ensure SoC designers can efficiently and confidently use both CellMath, for datapath, and PowerTheater, for a variety of intellectual property (IP) blocks and full chip, to achieve significant power improvements."

	Tony Curzon Price CEO Anthmatica


	"Engineers continuously trade off performance, area and power in SoC design. Now, with the combination of Sequence's PowerTheater power management and Bluespec's ESL synthesis, they can optimize their architecture to make the best design choice."

	Shiv Tasker CEO bluespec


	"Cadence will work with Sequence to the benefit of our customers. Sequence’s technology gives designers fast and accurate interconnect data to drive our physical design tools."

	Cadence Design Systems


	"Sequence is all about providing low-power excellence to their customers, Joining the In-Sequence program allows us to work together to deliver an intelligent debug environment for power reduction."

	Gerhard Angst President and CEO Concept Engineering


	"The accuracy of Sequence’s Columbus Interconnect Modeler complements Magma’s BlastFusion by helping customers maximize the performance of their designs."

	Magma Design Automation


	"The integration of CyberWorkBench with PowerTheater allows ESL synthesis to generate multiple trial configurations and then quickly estimate power at RTL. With this power data in hand, users can quickly examine tradeoffs for performance, area, and power to optimize the power profile early in the design cycle where the most significant savings can be achieved. Even low-power and/or low energy circuits can be easily synthesized, though this is not easy for RTL design."

	Dr. Kazutoshi Wakabayashi Chief Architect NEC-ST


	"The ability to analyze and debug power problems is critical when dealing with large complex designs with low power restrictions. The combination of Sequence's power analysis capabilities and Novas' VerdiTM Automated Debug System accelerates silicon closure while enabling higher degrees of design performance optimization."

	George Bakewell Director of Product Marketing NOVAS


	"Combining the deep physical knowledge and modern algorithms embodied in our field solver with the Columbus Library Builder will reduce the time required to set up Columbus for new processes, The accurate, detailed results provided by the field solver allow Columbus to maintain and improve its best-in-class accuracy "

	Ching-Chao Huang, Vice president of marketing. Pextra


	"Our work through the InSequence program allows us to combine two powerful design technologies and offer our mutual customers the ability to explore power optimization at the architecture level. This combination provides the user with unequaled insight into performance, area, and power for advanced SoCs early in the design, when analysis and design tradeoffs can have maximum impact."

	Simon Napper, president and CEO Synfora


	"To overcome the complex nanometer design challenges and gain greater confidence in meeting power and performance budgets, it's important to provide IP that supports various power reduction solutions that include accurate power and signal integrity modeling."

	Neal Carney Vice President of Marketing, Physical IP ARM


	"The proper power characterization of cells is particularly important to users of customer-owned tooling, who generally use Artisan's libraries "right out of the box." This collaboration is proactive in that we are addressing the power issues before the bulk of customers really move to the 90-nm node."

	Artisan


	"We are pleased to collaborate with Sequence Design, a Virage Logic VIP Partner, to help ensure our mutual customers have a complete IP solution that is tightly coupled with design and analysis tools to accelerate their silicon success."

	Brani Buric Senior Director, Business Development Virage Logic


	"Chartered and Sequence partner to bring accurate, silicon-aware power management for leading-edge technologies, enabling today's SoC designs."

	Walter Ng Senior Director, Platform Alliances Chartered semiconductor manufacturing


	"There are two things about Sequence that make them an ideal partner for this effort: First, they have unparalleled technology for dealing with power issues associated with today's most advanced semiconductor manufacturing; and second, their commitment to interoperability with other EDA vendors makes integration a pain-free experience for our customers."

	Jae Song Executive Vice President of Business Development Dongbu Electronics


	"Our foundry customers have used Columbus to tape out a large number of complex designs; we are impressed with its accuracy, versatility, and ease of use."

	Ned Cahoon Foundry Marketing and Business Development Design Partner Programs IBM Microelectronics


	"In order to achieve design closure on today's deep-submicron designs, our customers need solutions which will allow them to accurately model the interconnect," said Andley Chang, program manager of Design Service marketing at TSMC. "Our tests demonstrate that Columbus provides users with the ability to quickly and accurately predict interconnect performance of our most advanced technologies, which should translate to better overall design quality and time to market. We look forward to continue working with Sequence Design on our most advanced technologies."

	TSMC


	"Sequence Design's Columbus can help shorten development time and is designed to provide exceptional interconnect modeling accuracy for large, very complex chips."

	Fu Ta Liou President, America Business Group UMC


	"Sequence is all about low power and convergence, tackling multiple design issues concurrently to speed time to market while boosting performance and reliability. Joining In-Sequence gives us access to the latest tools and methods for low-power excellence, that we can quickly share with customers."

	Sam Appleton, CEO, Ausdia


	"Our partnership with Sequence allows Faraday to help our customers optimize for power at the architectural level, which is a fundamental enhancement. Faraday aims to provide the most efficient silicon-in area, power, and performance-to enable our customers to have the most competitive products in the market . The combination of Faraday's advanced ASIC design platform and Sequence's PowerTheater will enable our customers to address the most demanding low-power SoC applications ."

	Dr. George Hwang, Vice President of International Business at Faraday

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