CoolCircuit March '08

	THINK GLOBALLY, EXCEL LOCALLY
	USING POWER REGRESSION TESTING FOR SOC DESIGN
	ATTACKING ABUSES OF POWER - PART 1
	SEQUENCE USED BY NVIDIA FOR ACCELERATED SIGNOFF FOR LATEST GEFORCE GPU
	SEQUENCE DESIGN'S POWERTHEATER-EXPLORER NAMED 2008 DESIGNVISION AWARD FINALIST
	AMONG DESIGN CONSTRAINTS, POWER ASSUMES THE THRONE
	SEQUENCE DESIGN'S COLUMBUS-AMS TO BE DEPLOYED BY NEC CORPORATION IN ULTRA-HIGH-SPEED DIGITAL DESIGNS
	TAME THE TIMING MARGINS IN YOUR 65-NM DESIGNS
	UNDERSTANDING RTL POWER REDUCTION TECHNIQUES
	STANCH THE BLEEDING OF LEAKAGE POWER AT 65 NM
	SEQUENCE EXTENDS LOW-POWER LEADERSHIP: TWO NEW PATENTS, CTO FRENKIL FEATURED IN NEW DESIGN TOME
	STREAM PROCESSORS INC. SELECTS SEQUENCE POWERTHEATER FOR POWER OPTIMIZATION
	STREAM PROCESSORS SELECTS SEQUENCE POWERTHEATER FOR OPTIMIZATION
	INTERVIEW OF THE WEEK AT EPN ONLINE: WITH VIC KULKARNI
	S3 / VIA ACCELERATES DESIGN CLOSURE 30% WITH SEQUENCE COOLPRODUCTS

Customer Success

Technology

Events

Welcome to our first CoolCircuit Newsletter of 2008. This is going to be an exciting year for Sequence as we will be announcing our next-generation tool suite for automated RTL power reduction at DAC, furthering our commitment to bringing you the industry's most complete and powerful Design For Power™ (DFP) flow.

Our DFP initiative, launched last year, is in response to overwhelming customer demand for solutions that was recently brought home when we surveyed some of Japan's leading IC designers. More than 60 percent of them listed power analysis and reduction as their biggest design challenge.

DFP represents a holistic approach to power, enabling power exploration from the architectural level through physical implementation, reducing power while preventing power problems in timing, SI, and power grid design, with our unique silicon-aware design techniques. Customers using the DFP Flow are reporting RTL power reduction of up to 50 percent, a 50 percent speedup in design closure times, and leakage power reduction of up to 1,000X. In one notable example, a major wireless IC company used PowerTheater to fix three major power bugs in their design, resulting as much as a 50 percent reduction in active power.

More...

Vic Kulkarni, President and CEO, Sequence Design

Sequence Used by NVIDIA for Accelerated Signoff for Latest GeForce GPU

Sequence Design's CoolPower technology was used by NVIDIA Corporation in the recently announced GeForce 8800 GT design, a 65nm 754-million-transistor GPU...More...

Sequence Design's Columbus-AMS To Be Deployed By NEC Corporation In Ultra-High-Speed Digital Designs

Sequence Design's Columbus-AMS is a mainstay in the analog engineering community, but is also proving to be productive for the high-speed digital designers at NEC Corporation in Japan. According to Koji Saga, Department Manager, CAD Engineering Department, Computers Division, NEC Corporation, his group has been using Columbus for inductance extraction in ultra-high-speed digital designs to accurately analyze clock delays... More...

Stream Processors Inc. Selects Sequence PowerTheater for Power Optimization

Achieves Industry-Leading Power-Efficiency on Next-Gen DSP Platform. The provider of the world's most powerful Digital Signal Processor (DSP) platform, Stream Processors Inc. (SPI) chose Sequence Design's PowerTheater for early power management and low-power architecture evaluation for their new processor design, reducing power 20-50%... More...

Stream Processors Selects Sequence PowerTheater for Optimization

The provider of the world's most powerful Digital Signal Processor (DSP) platform, Stream Processors Inc. (SPI) chose Sequence Design's PowerTheater for early power management and low-power architecture evaluation for their new processor design, reducing power 20-50%... More...

S3 / Via Accelerates Design Closure 30% With Sequence CoolProducts

S3 Graphics, a subsidiary of Via Technologies, chose Sequence Design's CoolProducts for accelerated design closure, achieving 1GHz performance in a single pass, when implementing their next-generation 3D graphics chips. S3 Graphics is a leading supplier in the 3D enabled PC graphics market, delivering a wide range of features and performance to serve the graphics and multimedia needs of both the home and business markets.... More...

Think Globally, Excel Locally

The true meaning and essence of globalization is realized when you create teams of equals in locations scattered around the world.
It really is a small world. The modern executive maintains personal and professional contacts on several continents with customers, sales teams, R&D teams, production facilities, friends, and colleagues. Technology helps establish and foster these far-flung relationships, and many of us routinely communicate electronically (by voice, videoconference, e-mail) with people throughout the world ...More...

Using power regression testing for SoC design

SoC power has emerged as the key to market share for many segments including wireless, communications, consumer, computer, and video codec. In fact, power has become the new performance parameter in terms of SoC competitiveness! Designers today know that the key to Design for Power (DFP) is to manage power early in the design cycle. Lowering power consumption prolongs battery life, decreases chip costs, results in a compact design for more functionality per silicon area, increases reliability, and decreases end product costs with less need for fans and other cooling techniques. Battery technology in all honesty has not kept pace with chip functionality, and it is up to chip designers to balance performance and functionality in order to prolong battery life ...More...

Attacking Abuses of Power - Part 1

It's the era of energy. Look at the newspaper and see how many stories ultimately relate to energy. Oil and gas prices are up. Natural gas is no longer a cheap alternative to electricity. Energy companies teach the world that some of them can't be trusted to operate in a "free" market. Nuclear is given another look. .. More..

Sequence Design's PowerTheater-Explorer Named 2008 DesignVision Award Finalist

Sequence Design's PowerTheater-Explorer has been named a finalist for the 2008 DesignVision Awards sponsored by the International Engineering Consortium (IEC). Selected from a record number of entries, PowerTheater-Explorer is one of just three finalists in the "ASIC and Design Tools" category... More..

Among Design Constraints, Power Assumes The Throne

Over the past few years, the "power problem" has registered more strongly on the radars of system design teams. Portable and handheld consumer electronics keep shrinking. Hence, so do their batteries. Meanwhile, no one wants to sacrifice runtime in their mobile phones despite the desire to have cell phones go a long way toward replacing laptops. Thus, the onus falls on system-on-a-chip (SoC) designers to navigate the tradeoffs necessary to make that happen... More..

Tame the Timing Margins in Your 65-nm Designs

It's actually possible to recover 15% to 30% timing margin in your SOC design flow today. All it takes is better interconnect corner modeling when you extract parasitics - you can use the same static timing analysis (STA), same fab data, same modeling process... More..

Understanding RTL power reduction techniques
With the rapid growth of the mobile applications market, power dissipation is an increasing concern in system on chip (SoC) design. The biggest opportunities for power reduction exist pre-synthesis at the higher levels of abstraction. Since 80% or more of chip power is determined at the register transfer level (RTL) or earlier, full chip analysis before synthesis can also isolate architectural power problems that may be easily solved with RTL modifications...More..

Stanch The Bleeding Of Leakage Power At 65 nm
Even as leakage overwhelms their power budgets, IC design teams are finding ways to plug the holes that are costing them dearly at sub-micron nodes.
As 90-nm process technologies began entering the mainstream a few years ago, it became clear that device delays were no longer the chief culprit. Interconnect delays had caught and passed them, becoming the number-one contributor to timing woes...More..

Sequence Extends Low-Power Leadership: Two New Patents, CTO Frenkil Featured In New Design Tome
Sequence Design, EDA's Design-For-Power (DFP) technology leader, continues to excel by adding two important patents and announcing Sequence CTO Jerry Frenkil has a featured chapter in a new book about low-power design...More..

Interview of the Week at EPN Online: With Vic Kulkarni
Interview of the Week
Vic Kulkarni, CEO of Sequence Design, hopes for more convergence between the low-power standards available for IC design. He gives us a brief picture of this crucial aspect of EDA...More..

Industry Events Calendar

	Statistical Design - Solutions Searching for Problems? Panel March 19, 2008, ISQED, San Jose, CA The EDA community has been pitching statistical design as the salvation for design variability issues in sub 130nm design for several years. Although progress has been made, it has yet to be widely used. It is needed at the front-end of the process, but the information to support it is hard to get. But once the data is available , it is no longer necessary. This distinguished group has a 75% chance of answering this question ...More..

	Power Gating for Ultra-low Leakage: Physics, Design, and Analysis Tutorial March 10 -14, 2008, Design, Automation & Test in Europe (DATE), Munich, Germany The demand for portable electronic devices continues to grow rapidly and has generated great interest in low power design, which initially focused on controlling dynamic power consumption. However, the combination of wireless device operational characteristics and exponentially increasing leakage power in new processes motivated the development of leakage reduction techniques. Power gating has emerged as the most effective design technique for achieving ultra-low leakage power. While conceptually simple, in practice power gating is difficult to implement efficiently. This tutorial will provide detailed descriptions of the physics, motivations, benefits, challenges, techniques, methods, and tradeoffs associated with the design of power gated circuits...More..

	Join Sequence for a webinar on major new features in PowerTheater 2008.1 March 28, 2008, New Delhi, India You know that analyzing power early and often with PowerTheater gets you into cheaper packages, achieve "green" status and compete on power. But are you taking full advantage of PowerTheater's newest features?...More..

Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence's low power flow software solutions give customers the competitive advantage necessary to excel in aggressive technology markets, despite the demanding complexity and time-to-market issues of nanometer design. Sequence serves over 150 customers worldwide, in application segments such as consumer, wireless, mobile computing, multimedia, cell phones, digital cameras, network-on-chip processors, and other power-sensitive markets. Sequence has worldwide development and field-service operations and is privately held. Please see sequencedesign.com.

© Copyright 2008 Sequence Design, Inc. Cool by Design, CoolPower, CoolTime, PowerTheater, PhysicalStudio are trademarks of Sequence Design, Inc. All trademarks mentioned herein are the property of their respective owners.
Sequence Design, Inc. | 469 El Camino Real | Santa Clara CA 95050