| |
 |
 |
|
| |
 |
|
 |
|
| |
 |
 |
|
Dear
Friends,
The first quarter of 2006 was kicked off by EDAC by their
CEO Panel event. Most of the industry leaders now believe
that 2006 will be a growth year for EDA with predictions ranging
from 4 - 6% over 2005. This point was driven home by Wally
Rhines, CEO of Mentor Graphics, when he shared the industry
charts for a 3-year renewal cycle which now coincides with
2006. The move toward 90/65 nm is finally happening, leading
to the need for new-generation tools as the Laws of Physics
cannot be approximated any longer! |
 |
In
our own world of Sequence, this quarter was enlivened by several
international electronics design shows, including EDSF in
January in Japan, and DATE in Munich in March. EDSF 2006 was
very successful for Sequence, with over 300 customers, a record
number -, visiting our booth to learn more about - our focus
- in power-aware design solutions. High interest in power
analysis and management was combined with the recognition
that low-power design and timing closure are the biggest design
challenges... endorsing the Sequence RTL-to-silicon power
management flows.
The following
graph illustrates what designers are thinking about now:
 |
The DATE show was also notable for an increased focus
on power year-to-year. Designers presented several interesting
case studies on low power design techniques, including
clock gating, voltage islands and power gating approaches.
For those of you who will be in Seoul in April, please
mark your calendars, you are cordially invited to join
Sequence and DavanTech for a Low Power Seminar on April
27, 2006, from 10AM.
|
And of course, we
look forward to seeing you at the Design Automation Conference
in San Francisco this year.
Vic Kulkarni
President and CEO
Sequence Design, Inc. |
|
| |
 |
 |
| |
|
 |
|
EDA power leader Sequence Design
today disclosed that it is developing an advanced power-aware reference
flow with Korea's DongbuAnam Semiconductor Inc., one of the world's
largest pure-play wafer foundries, for 130nm and below process technologies.
The Sequence flow addresses a range of critical issues including SoC
(System-on-Chip) power analysis and optimization, stand-by leakage
and dynamic power optimization, and power grid analysis and optimization.
"There are two things about Sequence that make them an ideal
partner for this effort," said Jae Song, executive vice president
of strategic business development for DongbuAnam. "First, they
have unparalleled technology for dealing with power issues associated
with today's most advanced semiconductor manufacturing; and second,
their commitment to interoperability with other EDA vendors makes
integration a pain-free experience for our customers." |
| |
|
 |
|
After reviewing competing voltage
drop EDA tools, Genesis® Microchip Inc. selected Sequence Design
for multi-year, multi-site power management solutions. Genesis Microchip
is a world leader in the development of image processing technologies
for flat-panel TVs, monitors, and other consumer display products.
"High performance and power integrity are requirements for
our product line as we move to the next generation of digital display
controllers," said Genesis senior vice president of product development,
T. Chan. "We chose Sequence over other vendors due to their superior
products and application support."
Genesis design centers in the United States, Canada, and India are
using Sequence's CoolTime and CoolCheck -- a comprehensive, low-power
SoC design suite for power and voltage-drop analysis, power-grid verification,
and more. For details, click
here. |
| |
|
 |
|
Japan's Semiconductor Technology
Academic Research Center (STARC) has certified Sequence Design's PowerTheater
and CoolTime SoC power analysis and optimization tools for its new
STARCAD-21 production flow. STARC ()
is a research and development consortium founded by 11 major Japanese
semiconductor companies.
PowerTheater provides a complete power analysis and optimization toolkit
for full design realization, including the only reliable view of power
at the RT level. CoolTime is the industry's leading cell-based electrical
integrity tool for the concurrent analysis of voltage drop, power,
electromigration (EM), timing, and signal integrity (SI).
"CoolTime's ability to render accurate and convergent analysis
of interdependent electrical effects is well suited to meet the challenges
of 90nm design, and PowerTheater's results for peak power and average
power in advanced designs were highly correlated with actual silicon,"
said Nobuyuki Nishiguchi, vice president and general manager, Development
Dept.-1, STARC. "Sequence deftly meets the requirements for power-signoff,
and is a key component of this important new production flow."
|
| |
 |
 |
| |
 |
|
| Vic Kulkarni has worked in the
semiconductor and EDA industries for over 28 years. He was appointed
president and CEO of Sequence in May 2002. Prior to his appointment,
he served as Chief Operating Officer for more than two years where
he set the Company's vision and delivered power and signal integrity
products for nanometer systems-on-chip design. Mr. Kulkarni was named
"Entrepreneur of the Month" by SiliconIndia magazine in
July 2003 and was featured in Reed Electronics' "50 Electronics
Companies to Watch" in 2002 and 2003. Prior to joining Sequence,
Mr. Kulkarni was General Manager and Vice President of Avant!'s Silicon
Business Unit responsible for Silicon IP and Process Modeling tools.
He joined Avant! after the acquisition of Meta-Software where he was
Vice President of Worldwide Marketing. He was instrumental in taking
the Meta-Software public in November 1995 with a market cap of $160M.
Prior to Meta, Mr. Kulkarni held various engineering and marketing
positions in VLSI and National. Currently Mr. Kulkarni is also on
the Management Advisory Board of Arteris, an emerging innovative company
in Paris involved in network-on-chip designs. He has an M.S. E.E.
in Solid State Electronics from University of Cincinnati, Ohio and
B.Tech in Electrical Engineering from the Indian Institute of Technology
(IIT), Bombay in 1974. |
| |
 |
|
Industry veteran Holly Stump has
joined EDA power leader Sequence Design as its new vice president
of marketing. Stump, with more than 20 years in EDA and high-tech,
is responsible for corporate, product and strategic marketing tasks,
reporting directly to Sequence president and CEO Vic Kulkarni.
"Holly comes to us at an exciting time," Kulkarni said.
"Her charter and capabilities are fundamental as we launch the
company to the next level of success."
Stump's experience runs the gamut of high tech B2B marketing, business
development, channel management, and international sales experience
in the EDA, semiconductor and electronics industries. She is a veteran
of several successful EDA startups which have been acquired by industry
leaders. As a co-founder of Logic Modeling Systems (now Synopsys),
she built the marketing organization and channel relationships which
led to over $7 million in revenues in the first year of shipment;
did major accounts sales; and set up Asian sales and support operations
as managing director based in Tokyo. As vice president of sales and
marketing at Precedence (now Mentor Graphics), Stump signed several
key channel deals, grew revenues by a factor of 4, and helped the
company move from a consulting to product focus. |
| |
 |
 |
| |
 |
|
Sequence Design released the next
generation of its PowerTheater design suite, targeting requirements
for wireless, mobile, and large system-on-chip (SoC) designs below
the 90 nanometer node.
Sequence said new PowerTheater features enhance its RTL power analysis
capabilities and usability. Enhancements include peak power analysis,
power gating, voltage domains, expanded support for RTL and gate-level
power estimation of multiple voltage domains and support for SystemVerilog.
"Below 90 nanometer, power dominates all other issues,"
said Vic Kulkarni, Sequence president and CEO, in a statement. "PowerTheater
is unique in its ability to analyze and optimize power at RTL, where
decisions are made that determine 80 percent of a chip's total power
budget, leading to better results and faster time-to-market."
|
| |
 |
|
Sequence Design released the next
generation of Columbus-AMS, described by the company as both a foundation
for its RTL-to-silicon power-aware design tools and the industry's
premier RLC parasitic extraction tool for high-performance, analog/mixed-signal
design.
New features of Columbus-AMS include high-performance reduction controls
and mixed-mode modeling capabilities to save time and simplify wireless
and high-frequency design tasks, according to Sequence.
Highlights of the new Columbus-AMS include mixed-mode parasitic models
to shorten simulation times, a redesigned GUI with controls in an
intuitive workflow order, and saving and reloading of all settings
for easy, accurate reuse or sharing of setups, the company said. |
| |
 |
 |
| |
|
| Industry Events
Calendar |
 |
- Seoul, Korea - April 27, 2006
Sequence Design, the EDA leader in power-aware SoC design solutions,
will host a low-power design seminar in Seoul on April 27, 2006,
from 10am to 3:30pm. Korean chip designers in the fast-growing
consumer, mobile, and highly integrated device markets are encouraged
to attend by contacting Sequence's local distributor, DavanTech.
The seminar, to be held at Hotel Lotte World, focuses on four
areas: predicting power consumption early in the design cycle,
reduction of switching power consumption, reduction of leakage
power, and efficient power-grid design. In addition to product
and technology updates from Sequence, a series of guest speakers
will present on low-power design techniques and related topics.
|
| |
 |
- Moscone Center, San Francisco, California - July 24-28,
2006
The Design Automation Conference (DAC) is the premier Electronic
Design Automation (EDA) and silicon solution event. DAC features
over 50 technical sessions covering the latest in design methodologies
and EDA tool developments and an Exhibition and Demo Suite area
with over 250 of the leading EDA, silicon and IP Providers. |
|
| |
 |
 |
| Sequence Design accelerates
the ability of SoC designers to bring high-performance, power-aware
ICs quickly to market. Sequence's power and signal- integrity software
give customers the competitive advantage necessary to excel in aggressive
technology markets, despite the demanding complexity and time-to-market
issues of nanometer design. Sequence serves 8 of the top 10 semiconductor
companies, and over 130 customers worldwide, in application segments
encompassing consumer goods, wireless devices, personal computers,
multimedia and more. The company was named by Reed Electronics as
one of the top 10 companies to watch in the electronics industry,
and was recently selected as one of high-tech's Top 100 companies
by siliconindia magazine. |
| |
 |
© Copyright 2005 Sequence Design,
Inc. Cool by Design, CoolPower, CoolTime, PowerTheater, PhysicalStudio
are trademarks of Sequence Design, Inc. All trademarks mentioned herein
are the property of their respective owners.
Sequence Design, Inc. | 469 El Camino Real | Santa Clara CA 95050
This message was sent by Sequence Design, Inc. Click
here if you prefer not to receive future e-mail from Sequence
Design, Inc. |
|