Sequence Design today announced Hifn™, the catalyst behind storage and networking innovation, is using its PowerArtist™ to achieve a significant power reduction on advanced packet processor designs.  Hifn chose PowerArtist, Sequence’s automated RTL power reduction solution, after an extensive evaluation of competing low-power design tools…MORE…

Pairing Sequence Design's PowerTheater, and the low-power design expertise of NemoChips and Faraday Technology Corporation, led to a 52 percent reduction in total power for an advanced mobile processor design.  NemoChips recently taped out its next-generation processor, designed jointly with Faraday's SoCompiler Design Services, that ushers in a new era in mobile computing with ultra-high performance for streaming HD video, and power usage as much as 10X less than its closest competitor. NemoChips is an emerging leader in low-power multimedia platform ICs…MORE…

Sequence Design, the EDA leader in Design for Power (DFP) solutions, today announced its PowerArtist™ automated RTL power reduction solution has secured a coveted spot on EDN Magazine’s 2008 Hot 100 Products list.  PowerArtist is one of eight products selected in the EDA category on EDN’s annual list, which highlights those products singled out by the magazine’s editors as the most innovative and newsworthy items reported on in the past year…MORE…

It’s time once again for EDN’s annual Hot 100 Products list. Each year, manufacturers announce thousands of new products and technologies. EDN’s editors spend countless hours narrowing that massive list to the hundreds of items they consider innovative and newsworthy enough to report on both in print and on the Web. The list on these pages represents the best of the best—the products and technologies that in 2008 really grabbed the attention of our editors and our readers…MORE…

There are two challenges facing SoC designers who want to perform power analysis and management. First, and most obviously, designers need to verify that their design intent is captured in CPF results in a design that meets power budgets for all modes of operation. Second, designers exploring architectural alternatives at the RT level of abstraction need to be able to rapidly evaluate the power impact of their choices and then capture their decisions in CPF for use by other tools in the design flow…MORE…

Sequence Design's PowerTheater has added new "timing-aware" RTL power analysis features to meet the twin challenges of shrinking process geometries and high-performance devices driving hundreds of clock domains. These changes result in highly accurate, timing-aware RTL power analysis in addition to the 10X productivity boost that RTL power management provides over gate-level…MORE…

With power emerging as a top concern, an increasing number of PowerTheater customers have setup regression flows to tightly manage power as they go through their design flow. It has become imperative not only to understand power early but also to monitor it throughout the design flow.…MORE…

Commercial power analysis tools have been available now for more than 10 years, operating at the gate and transistor level of abstraction. For analog, mixed signal, and custom designs, transistor-level tools are utilized as both design and verification tools; that is, they help the designer in analyzing power and serve as the final ‘signoff’ to ensure that power specifications are met. For standard-cell ASIC and SoC designs, gate-level and transistor-level power analysis tools can only be used as the final verification tools since they are used late in the overall design flow. This white paper presents a Design for Power (DFP) methodology, beginning early in the design process at the register transfer level (RTL).…MORE…

Is it possible to have too much of a good thing?  It might depend on the thing – vitamins, fresh air, and good schools, we definitely can’t have too much of these.  On the other hand consider beer, government, and spouses (ok, maybe some would debate if even one is good thing) – it’s clearly not a good idea to have too much of these.  But what about design automation and power efficiency?  We can probably all agree that these are both good things.  But can we have too much?…MORE…

Sequence Design, the EDA leader in Design for Power (DFP)™ solutions, hosted its third annual low-power System-on-Chip (SoC) Design Seminar in Bangalore on Wednesday, Sept. 10 beginning at 9am. Notable speakers from business and academia highlighted the day's events - followed by a luncheon…MORE…

Sequence Design's Design For Power (DFP) solutions accelerate the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence's power and signal-integrity software give customers the competitive advantage necessary to excel in aggressive technology markets. Sequence is an active participant in industry organizations advancing low-power design technologies such as the Power Forward Initiative and holds a seat on the board of Si2. Please see sequencedesign.com.